The inventive concepts described herein are generally related to semiconductor memory devices, and more particularly, to a semiconductor memory device in which a word line is driven in the same direction as a sense amplifier control signal line.
Semiconductor memory devices are basically equipped with sensing circuits for detecting and amplifying data transferred through bit lines. If a word line is selectively activated, data of memory cells coupled to the selected word line are transferred to the sensing circuit by way of bit lines. The sensing circuit detects and amplifies the data transferred through the bit lines, and outputs the detected and amplified data. The sensing circuit may include an equalizer, an NMOS sense amplifier, and a PMOS sense amplifier, each of which is operable in response to signals transferred to drive signal lines arranged in a word line direction.